/DIAG/G
SYSTEM CONFIGURATION GENERATE
CONFIGURATION OF TEST HEAD
PIN CONFIGURATION 1. 480DR+320I/O(HALF)
2. 768DR+512I/O(FULL)
3. 960DR+640I/O(FULL)
4. 240DR+160I/O(QUARTER) [1-4] ...> 3
NUMBER OF TEST HEAD [1,2] ...........................> 2
CONFIGURATION OF TEST HEAD 1
PE BOARD TYPE 0.NO BOARD
1.BGM-023206X04 (DR+IO PE,x2 AMP)
2.BGM-023206X05 (DR PE,x2 AMP)
PIN 1 13 25
CHILD A1 ....> 1 1 1
CHILD A3 ....> 1 1 1
CHILD B1 ....> 1 1 1
CHILD B3 ....> 1 1 1
CHILD C1 ....> 1 1 1
CHILD C3 ....> 1 1 1
CHILD D1 ....> 1 1 1
CHILD D3 ....> 1 1 1
CHILD E1 ....> 1 1 1
CHILD E3 ....> 1 1 1
CHILD F1 ....> 1 1 1
CHILD F3 ....> 1 1 1
CHILD G1 ....> 1 1 1
CHILD G3 ....> 1 1 1
CHILD H1 ....> 1 1 1
CHILD H3 ....> 1 1 1
CONFIGURATION OF TEST HEAD 2
PE BOARD TYPE 0.NO BOARD
1.BGM-023206X04 (DR+IO PE,x2 AMP)
2.BGM-023206X05 (DR PE,x2 AMP)
PIN 1 13 25
CHILD A1 ....> 1 1 1
CHILD A3 ....> 1 1 1
CHILD B1 ....> 1 1 1
CHILD B3 ....> 1 1 1
CHILD C1 ....> 1 1 1
CHILD C3 ....> 1 1 1
CHILD D1 ....> 1 1 1
CHILD D3 ....> 1 1 1
CHILD E1 ....> 1 1 1
CHILD E3 ....> 1 1 1
CHILD F1 ....> 1 1 1
CHILD F3 ....> 1 1 1
CHILD G1 ....> 1 1 1
CHILD G3 ....> 1 1 1
CHILD H1 ....> 1 1 1
CHILD H3 ....> 1 1 1
CONFIGURATION OF DPU
1'ST DPU : STN 1,2 [Y,N] ..........................> YES
TEST HEAD 1 DC CONFIGURATION [1-32] .............> 1-32
PPS CONFIGURATION [1-128] ............> 1-128
TEST HEAD 2 DC CONFIGURATION [1-32] .............> 1-32
PPS CONFIGURATION [1-128] ............> 1-128
AC FREQUENCY (Hz) [50,60] ........................> 60
CONFIGURATION OF FTU
FLASH OPTION [Y,N] ...........................> YES
CONFIGURATION OF FM
TYPE OF FM [1:NORMAL(AFM), 2:MRA4(FMRA)] ............> 2
NUMBER OF FMRA BOARD [0-8] ...........................> 8
SIZE OF FMRA BOARD [0,0G, 1:1G, 2:4G] ..............> 1
PM(PATTERN MEMORY) BOARD EXIST [Y,N] .................> YES
SIZE OF PM BOARD [1:576M] ..........................> 1
END SAVE
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/LOG OD FF
Semiconductor Test 
